• Conceptual design of FPGA modules in collaboration with different teams (Algorithms, SW, HW, RF). Implementation and simulation in VHDL, synthesis and testing in lab.
• Maintenance of existing designs: implementing additions and modifications in existing FPGA designs.
• BSc. Degree in electrical engineering – must. Major in communication – an advantage
• 5 years’ experience developing complex designs in FPGA in VHDL or Verilog
• Experience with Altera components and development tools – an advantage
• Experience with board design, and hardware test equipment – an advantage
• Team player
• Ability and experience at working with developers from other R&D departments (Algorithms, HW, SW)
• A high level of proficiency in English